Scalar Replacement with Circular Buffers

• Seto Kenshu

  Tokyo City University

Abstract

Scalar replacement is one of effective array access optimizations that can be applied before High-level synthesis (HLS). The successful application of scalar replacement removes local memories, and as a result, it decreases hardware area. In addition, scalar replacement reduces the numbers of hardware execution cycles by reducing memory access conflicts. In scalar replacement, shift registers are introduced to remove local arrays, and reuse distances corresponds to the lengths of the shift registers. Previous scalar replacement methods implement the shift registers with chains of registers, so that the hardware area becomes large when the reuse distances are large. In addition, when reuse distances are unknown at compile time, previous scalar replacement methods require multiplexers with large numbers of inputs, which further increase on hardware area. In this paper, we propose a new technique to resolve the issues. In particular, we implement the shift registers with circular buffers instead of chains of registers. Large shift registers implemented by RAM-based circular buffers are more compact than those implemented by the chains of registers. We also show that the proposed method requires no multiplexers to realize scalar replacement for loops with statically unknown reuse distances, which leads to area-efficient hardware implementation. We developed a tool that implements the method and applied the tool to the benchmark programs which require large shift registers or have statically unknown reuse distances. We found that the hardware area is reduced with the proposed method compared to the previous method without sacrificing the hardware performance. We conclude that the proposed method is an area efficient scalar replacement method for programs that have large or unknown reuse distances at compile time.

Journal

• IPSJ Transactions on System LSI Design Methodology

  IPSJ Transactions on System LSI Design Methodology 12 (0), 13-21, 2019

  Information Processing Society of Japan

Keywords

• high level synthesis
• scalar replacement
• shift register
• circular buffer
• loop pipelining

Details

• CRID: 1390845713053876096
• NII Article ID: 130007603116
• DOI: 10.2197/ipsjtsldm.12.13
• ISSN: 18826687
• Web Site: https://www.jstage.jst.go.jp/article/ipsjtsldm/12/0/12_13/_pdf
• Text Lang: en
• Data Source:
  • JaLC
  • Crossref
  • CiNii Articles
  • KAKEN
• Abstract License Flag: Disallowed