An improved implementation of sum-product algorithm for LDPC decoder

• Wang Zhou

  Institute of Microelectronics of Chinese Academy of Sciences University of Chinese Academy of Sciences

• Wu Bin

  Institute of Microelectronics of Chinese Academy of Sciences

• Ye Tianchun

  Institute of Microelectronics of Chinese Academy of Sciences University of Chinese Academy of Sciences

抄録

An improved decoding algorithm for low-density parity-check (LDPC) codes is presented. By taking advantages of the first-term Taylor’s series multiple expansion to approximate the correction term of the Jacobian logarithm used in LLR-SPA (log-likelihood ratio sum-product algorithm), we propose an algorithm which significantly simplifies the check node update computation of the optimal LLR-SPA. Besides, the parameter δ is introduced to determine suitable expansion points. The simulation result shows that the proposed method with ten expansion points when δ is set to 0.01 has almost identical performance compared with ideal SPA algorithm and outperforms both the min-sum algorithm (MS), the offset min-sum algorithm (OMS) and the normalised min-sum algorithm (NMS). The architecture of proposed method is also presented for implementation, which has reduced computational complexity and is feasible for hardware implementation.

収録刊行物

• IEICE Electronics Express

  IEICE Electronics Express 16 (4), 20180828-20180828, 2019

  一般社団法人 電子情報通信学会

キーワード

• LDPC decoder
• sum-product algorithm
• Taylor series

詳細情報

• CRID: 1390564238077357312
• NII論文ID: 130007603842
• DOI: 10.1587/elex.16.20180828
• ISSN: 13492543
• Web Site: https://www.jstage.jst.go.jp/article/elex/16/4/16_16.20180828/_pdf
• 本文言語コード: en
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