書誌事項
- タイトル別名
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- Hysterisial Variable-Threshold MOS Gates
- ヒステリシス オ ユウスル カヘン シキイ MOS ゲート
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<p>Asynchronous circuits are a technique in order to solve the some serious synchronous circuits' problems such as clock skew, power consumption and electromagnetic noise. In this paper, we designed histerisial variable-threshold gates based on neuron MOS transistors for asynchronous circuits. The proposed hysteresial variable-threshold gates are also expected usuful for neural networks or machine larning for the hysteresis, that is memory, characteristics. The developed gates having variable-threshold operations can be used to set a threshold of a neuron. The simulation results of hysteresial variable-threshold gates are provided with SPICE simulator. The synthesized hysterisial variable-threshold gates has three gate-inputs and two control wires. Then asynchronous half-adder is demonstrated as an arithmetic circuit example.</p>
収録刊行物
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- 電気学会論文誌C(電子・情報・システム部門誌)
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電気学会論文誌C(電子・情報・システム部門誌) 139 (9), 958-963, 2019-09-01
一般社団法人 電気学会
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詳細情報 詳細情報について
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- CRID
- 1390282752321116160
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- NII論文ID
- 130007700122
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- NII書誌ID
- AN10065950
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- ISSN
- 13488155
- 03854221
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- NDL書誌ID
- 029972151
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- 本文言語コード
- ja
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- データソース種別
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- JaLC
- NDL
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- 使用不可