Offset Voltage and Output Voltage Ripple Reduction of an Operational Amplifier using Auto-zero Technique
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- Motoki Shintaro
- University of Yamanashi
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- Sato Takahide
- University of Yamanashi
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- Ogawa Satomi
- University of Yamanashi
Bibliographic Information
- Other Title
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- オートゼロ技術を用いた演算増幅器のオフセット電圧および出力電圧リプルの低減
- オートゼロ ギジュツ オ モチイタ エンザン ゾウフクキ ノ オフセット デンアツ オヨビ シュツリョク デンアツ リプル ノ テイゲン
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Abstract
<p>In this paper, an auto-zero amplifier which reduces the offset voltage and output voltage ripple caused by the non-ideal characteristics of CMOS switches is proposed. Three capacitors are used to store the compensation voltage for an internal amplifier in the proposed circuit. The capacitors hold the voltage between two input terminals of the amplifiers even if a charge injection and/or a clock feed through occur at CMOS switches. The proposed circuit reduces the output offset voltage to 43.8% and the output voltage ripple to 42.8% compared to the conventional circuit.</p>
Journal
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- IEEJ Transactions on Electronics, Information and Systems
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IEEJ Transactions on Electronics, Information and Systems 140 (1), 32-37, 2020-01-01
The Institute of Electrical Engineers of Japan
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Details 詳細情報について
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- CRID
- 1390283659837190400
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- NII Article ID
- 130007779194
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- NII Book ID
- AN10065950
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- ISSN
- 13488155
- 03854221
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- NDL BIB ID
- 030204139
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- Text Lang
- ja
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- Data Source
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- JaLC
- NDL
- Crossref
- CiNii Articles
- KAKEN
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- Abstract License Flag
- Disallowed