Steady-state analysis and design of phase-controlled class-D ZVS inverter

  • Osato Tatsuki
    Graduate School of Science and Engineering, Chiba University
  • Wei Xiuqin
    Department of Electrical Engineering, Chiba Institute of Technology University
  • Asiya
    Graduate School of Science and Engineering, Chiba University
  • Nguyen Kien
    Graduate School of Science and Engineering, Chiba University
  • Sekiya Hiroo
    Graduate School of Science and Engineering, Chiba University

抄録

<p>This paper proposes an analysis and design method of the phase-controlled class-D Zero-Voltage Switching (ZVS) inverter. To derive the ZVS region diagram, a steady-state waveform of the phase-controlled class-D inverter is analytically derived. This analysis introduces an expression of an anti-parallel diode behavior and multiple-harmonic analysis. By developing a ZVS region diagram at the fixed phase shift and drawing power contour lines over the region diagram, a parameter region, in which sufficient power can be obtained with achieving the ZVS, are also determined. The analysis and design method of this paper were verified through circuit experiments and by collating the quantitative values obtained from the experiment and analysis.</p>

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