書誌事項
- タイトル別名
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- A Design of EEGNet based Inference Processor for Pattern Recognition of EEG using FPGA
- FPGA オ モチイタ ノウハ ノ パターン ニンシキヨウ EEGNet スイロン ショリ センヨウ プロセッサ ノ イッポウ シキ
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<p>In recent years, brain-machine interface (BMI) is attracting attention. BMI is a technology that enables machine operation using biological signals such as EEG. For further advancement of BMI technology, there is a need for advanced BMI devices. Therefore, the purpose of this study is development of BMI hardware specialized for handling EEG as an interface for human adaptive mechatronics (HAM) that know human’s state and operate according to the state. As one of the examinations, we are constructing a pattern recognition processor for EEG in real time on Field Programmable Gate Array (FPGA), which is an LSI that can reconfigure the processor. This paper reports on the designed EEGNet processor and the result of logic circuit simulation and implementation.</p>
収録刊行物
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- 電気学会論文誌C(電子・情報・システム部門誌)
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電気学会論文誌C(電子・情報・システム部門誌) 140 (7), 737-746, 2020-07-01
一般社団法人 電気学会
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詳細情報 詳細情報について
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- CRID
- 1390003825194780928
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- NII論文ID
- 130007867794
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- NII書誌ID
- AN10065950
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- ISSN
- 13488155
- 03854221
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- NDL書誌ID
- 030545999
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- 本文言語コード
- ja
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- データソース種別
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- JaLC
- NDL
- Crossref
- CiNii Articles
- KAKEN
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- 抄録ライセンスフラグ
- 使用不可