Real-time detection of hardware trojan attacks on General-Purpose Registers in a RISC-V processor

DOI Web Site 被引用文献1件 参考文献23件
  • Yuan ShiWei
    Research Institute of Electronic Science and Technology, University of Electronic Science and Technology
  • Li Lei
    Research Institute of Electronic Science and Technology, University of Electronic Science and Technology
  • Yang Ji
    Unit 78102 of the Chinese People’s Liberation Army
  • He Yuanhang
    Science and Technology on Communication Security Laboratory, Institute of Southwest Communication
  • Zhou WanTing
    Research Institute of Electronic Science and Technology, University of Electronic Science and Technology
  • Li Jin
    Research Institute of Electronic Science and Technology, University of Electronic Science and Technology

抄録

<p>Hardware trojans(HT) is one of the main threats for hardware security, especially attacks on General-Purpose Registers(GPRs) of processors. This paper presented a novel method to detect HT induced attacks by comparing the states of GPRs with an embedded reference model in real time. Firstly, the instruction sequence was realigned with four principles. Secondly, based on the realigned instruction stream, a reference model for GPRs was built. Finally, HT induced attacks on GPRs can be detected by comparing the expected GPRs’ state from the reference model with the sampled GPRs’ state from processors. We integrated this method into a RISC-V core of PULpino and investigated the feasibility with different programs. The experimental results showed that all the randomly inserted HT attacks can be detected in real time with the latency of two clock cycles.</p>

収録刊行物

  • IEICE Electronics Express

    IEICE Electronics Express 18 (10), 20210098-20210098, 2021-05-25

    一般社団法人 電子情報通信学会

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