A DLL-Based Body Bias Generator with Independent P-Well and N-Well Biasing for Minimum Energy Operation

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  • NAGAI Kentaro
    Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
  • SHIOMI Jun
    Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University
  • ONODERA Hidetoshi
    Department of Communications and Computer Engineering, Graduate School of Informatics, Kyoto University

Abstract

<p>This paper proposes an area- and energy-efficient DLL-based body bias generator (BBG) for minimum energy operation that controls p-well and n-well bias independently. The BBG can minimize total energy consumption of target circuits under a skewed process condition between nMOSFETs and pMOSFETs. The proposed BBG is composed of digital cells compatible with cell-based design, which enables energy- and area-efficient implementation without additional supply voltages. A test circuit is implemented in a 65-nm FDSOI process. Measurement results using a 32-bit RISC processor on the same chip show that the proposed BBG can reduce energy consumption close to a minimum within a 3% energy loss. In this condition, energy and area overheads of the BBG are 0.2% and 0.12%, respectively.</p>

Journal

  • IEICE Transactions on Electronics

    IEICE Transactions on Electronics E104.C (10), 617-624, 2021-10-01

    The Institute of Electronics, Information and Communication Engineers

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