Reducing DC-Link Current Harmonics in Dual-Inverter Fed Induction Motor with Lower-Voltage Rating Inverter
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- Mizukoshi Akihito
- Nagaoka University of Technology
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- Haga Hitoshi
- Nagaoka University of Technology
抄録
<p>This letter proposes a control method to reduce the high-order harmonics caused by pulse-width modulation (PWM) in the DC-link current in a dual inverter with a floating capacitor topology, which has the same voltage ratings in two inverters. The proposed control method reduces the high-order harmonic current through a six-step operation at the primary inverter. The secondary inverter supplies a sinusoidal voltage to the motor using a low-rated voltage. The validity of the proposed control method is confirmed through an experiment using an open-end winding induction motor. Furthermore, the floating capacitor voltage dependencies of the input current harmonics are analyzed.</p>
収録刊行物
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- IEEJ Journal of Industry Applications
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IEEJ Journal of Industry Applications 11 (1), 189-190, 2022-01-01
一般社団法人 電気学会
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詳細情報 詳細情報について
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- CRID
- 1390853567321775616
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- NII論文ID
- 130008139375
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- ISSN
- 21871108
- 21871094
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- 本文言語コード
- en
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- データソース種別
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- JaLC
- Crossref
- CiNii Articles
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- 抄録ライセンスフラグ
- 使用不可