Adiabatic Quantum-Flux-Parametron with Delay-Line Clocking Using Square Excitation Currents

• YAMAE Taiki

  Department of Electrical and Computer Engineering, Yokohama National University Japan Society for the Promotion of Science

• TAKEUCHI Naoki

  Research Center for Emerging Computing Technologies, the National Institute of Advanced Industrial Science and Technology (AIST) Institute of Advanced Sciences, Yokohama National University

• YOSHIKAWA Nobuyuki

  Department of Electrical and Computer Engineering, Yokohama National University Institute of Advanced Sciences, Yokohama National University

抄録

The adiabatic quantum-flux-parametron (AQFP) is an energy-efficient superconductor logic device. In a previous study, we proposed a low-latency clocking scheme called delay-line clocking, and several low-latency AQFP logic gates have been demonstrated. In delay-line clocking, the latency between adjacent excitation phases is determined by the propagation delay of excitation currents, and thus the rising time of excitation currents should be sufficiently small; otherwise, an AQFP gate can switch before the previous gate is fully excited. This means that delay-line clocking needs high clock frequencies, because typical excitation currents are sinusoidal and the rising time depends on the frequency. However, AQFP circuits need to be tested in a wide frequency range experimentally. Hence, in the present study, we investigate AQFP circuits adopting delay-line clocking with square excitation currents to apply delay-line clocking in a low frequency range. Square excitation currents have shorter rising time than sinusoidal excitation currents and thus enable low frequency operation. We demonstrate an AQFP buffer chain with delay-line clocking using square excitation currents, in which the latency is approximately 20ps per gate, and confirm that the operating margin for the buffer chain is kept sufficiently wide at clock frequencies below 1GHz, whereas in the sinusoidal case the operating margin shrinks below 500MHz. These results indicate that AQFP circuits adopting delay-line clocking can operate in a low frequency range by using square excitation currents.

収録刊行物

• IEICE Transactions on Electronics

  IEICE Transactions on Electronics E105.C (6), 277-282, 2022-06-01

  一般社団法人 電子情報通信学会

キーワード

• superconducting integrated circuits
• quantum-flux-parametron
• adiabatic logic
• low-latency clocking

詳細情報

• CRID: 1390292251331783040
• NII論文ID: 130008142637
• DOI: 10.1587/transele.2021sep0004
• ISSN: 17451353
• ISSN: 09168524
• Web Site: https://www.jstage.jst.go.jp/article/transele/E105.C/6/E105.C_2021SEP0004/_pdf
• 本文言語コード: en
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