Reducing Jitter and Energy in Hard Real-time Systems Using Intra-task DVFS Technique

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Abstract

This paper presents a jitter-aware Intra-task DVFS scheme for mitigating finish time jitter and energy consumption in hard real-time system. Dynamic Voltage and Frequency Scaling (DVFS) technique enables systems to proactively manipulate actual execution/response time of tasks. Predictability of tasks' response times, i.e., shorter finish time jitter, is as important as energy consumption in some real time control applications. The strategy proposed in this study mainly applies control and data flow analysis to insert additional frequency scaling code (instructions to change processor's voltage and frequency). Moreover, it determines the appropriate frequency scaling factor. Through evaluation by multitasking simulation, it is shown that not only variation of response time among tasks' instances could be reduced, but energy consumption was reduced as a side effect.

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