Effect of III–V on insulator structure on quantum well intermixing

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<jats:title>Abstract</jats:title> <jats:p>To achieve the monolithic active/passive integration on the III–V CMOS photonics platform, quantum well intermixing (QWI) on III–V on insulator (III–V-OI) is studied for fabricating multi-bandgap III–V-OI wafers. By optimizing the QWI condition for a 250-nm-thick III–V layer, which contains a five-layer InGaAsP-based multi-quantum well (MQW) with 80-nm-thick indium phosphide (InP) cladding layers, we have successfully achieved a photoluminescence (PL) peak shift of over 100 nm on the III–V-OI wafer. We have also found that the progress of QWI on the III–V-OI wafer is slower than that on the InP bulk wafer regardless of the buried oxide (BOX) thickness, bonding interface materials, and handle wafers. We have also found that the progress of QWI on the III–V-OI wafer is slower than that on the InP bulk wafer regardless of the buried oxide (BOX) thickness, bonding interface materials, and bulk support wafers on which the III–V-OI structure is formed (handle wafers). By comparing between the measured PL shift and simulated diffusions of phosphorus vacancies and interstitials during QWI, we have found that the slow QWI progress in the III–V-OI wafer is probably attributed to the enhanced recombination of vacancies and interstitials by the diffusion blocking of vacancies and interstitials at the BOX interface.</jats:p>

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