Fabrication of flat micro‐gap electrodes for molecular electronics

Abstract

<jats:title>Abstract</jats:title><jats:p>Recently, organic molecular electronic devices such as molecular thin‐film transistors have received considerable attention as possible candidates for next‐generation electronic and optical devices. This paper reports on fabrication technologies of flat metallic electrodes on insulating substrates with a micrometer separation for high‐performance molecular device evaluation. The key technologies of fabricating planar‐type electrodes are the liftoff method by the combination of bilayer photoresist with overhang profile, electron beam evaporation of thin metal (Ti and Au) films, and SiO<jats:sub>2</jats:sub>‐CMP (Chemical Mechanical Polishing) method of CVD (Chemical Vapor Deposition)‐deposited TEOS (tetraethoxysilane)–SiO<jats:sub>2</jats:sub> layer. The raggedness of the electrode/insulator interface and the electrode surface of the micro‐gap electrodes were less than 3 nm. The isolation characteristics of fabricated electrodes were on the order of 10<jats:sup>13</jats:sup> ohms at room temperature, which is sufficient for evaluating electronic properties of organic thin‐film devices. Finally, pentacene FET (Field Effect Transistor) characteristics are discussed fabricated on the micro‐gap flat electrodes. The mobility of this FET was 0.015 cm<jats:sup>2</jats:sup>/Vs, which was almost on the order of the previous results. These results suggest that high‐performance organic thin‐film transistors can be realized on these advanced electrode structures. © 2005 Wiley Periodicals, Inc. Electr Eng Jpn, 152(2): 39–46, 2005; Published online in Wiley InterScience (<jats:ext-link xmlns:xlink="http://www.w3.org/1999/xlink" xlink:href="http://www.interscience.wiley.com">www.interscience.wiley.com</jats:ext-link>). DOI 10.1002/eej.20152</jats:p>

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