Failure Modes of Flip Chip Solder Joints Under High Electric Current Density

• C. Basaran

  Electronic Packaging Laboratory, University at Buffalo, SUNY, Buffalo, New York

• H. Ye

  Electronic Packaging Laboratory, University at Buffalo, SUNY, Buffalo, New York

• D. C. Hopkins

  Electronic Packaging Laboratory, University at Buffalo, SUNY, Buffalo, New York

• D. Frear

  Freescale semiconductor Inc., Tempe, Arizona

• J. K. Lin

  Freescale semiconductor Inc., Tempe, Arizona

抄録

The failure modes of flip chip solder joints under high electrical current density are studied experimentally. Three different failure modes are reported. Only one of the failure modes is caused by the combined effect of electromigration and thermomigration, where void nucleation and growth contribute to the ultimate failure of the module. The Ni under bump metallization–solder joint interface is found to be the favorite site for void nucleation and growth. The effect of pre-existing voids on the failure mechanism of a solder joint is also investigated

収録刊行物

• Journal of Electronic Packaging

  Journal of Electronic Packaging 127 (2), 157-163, 2004-09-15

  ASME International

キーワード

• Electrical and Electronic Engineering
• Computer Science Applications
• Mechanics of Materials
• Electronic, Optical and Magnetic Materials

詳細情報

• CRID: 1360292620633068416
• NII論文ID: 30020268588
• DOI: 10.1115/1.1898338
• ISSN: 15289044
• ISSN: 10437398
• Web Site: http://asmedigitalcollection.asme.org/electronicpackaging/article-pdf/127/2/157/5677691/157_1.pdf
• データソース種別:
  • Crossref
  • CiNii Articles