Parallel logic programming 並列論理プログラミング

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著者

    • 竹内, 彰一 タケウチ, アキカズ

書誌事項

タイトル

Parallel logic programming

タイトル別名

並列論理プログラミング

著者名

竹内, 彰一

著者別名

タケウチ, アキカズ

学位授与大学

東京大学

取得学位

工学博士

学位授与番号

乙第9892号

学位授与年月日

1990-11-15

注記・抄録

博士論文

目次

  1. Abstract / p1 (0003.jp2)
  2. Contents / p3 (0004.jp2)
  3. I Introduction / p3 (0009.jp2)
  4. 1 Introduction / p5 (0010.jp2)
  5. 2 Logic Programs / p9 (0012.jp2)
  6. 2.1 Syntax / p9 (0012.jp2)
  7. 2.2 Procedural Interpretation / p11 (0013.jp2)
  8. 2.3 Parallel Interpretation Models / p11 (0013.jp2)
  9. II AND-Parallel Programming / p13 (0014.jp2)
  10. 3 Parallel Logic Programming Languages / p15 (0015.jp2)
  11. 3.1 Introduction / p15 (0015.jp2)
  12. 3.2 AND-Parallel Computation Model / p17 (0016.jp2)
  13. 3.3 Languages / p19 (0017.jp2)
  14. 3.4 Programming―Process Interpretation of Logic / p27 (0021.jp2)
  15. 3.5 Semantics Issues / p28 (0022.jp2)
  16. 4 Stream Programming / p35 (0025.jp2)
  17. 4.1 Introduction / p35 (0025.jp2)
  18. 4.2 Communication via Shared Logical Variables / p35 (0025.jp2)
  19. 4.3 Abstract Stream Communication / p42 (0029.jp2)
  20. 4.4 Short Circuit Technique / p45 (0030.jp2)
  21. 4.5 Concluding Remarks / p49 (0032.jp2)
  22. 5 Object Oriented Programming / p51 (0033.jp2)
  23. 5.1 Introduction / p51 (0033.jp2)
  24. 5.2 Object Oriented Programming / p51 (0033.jp2)
  25. 5.3 Multi-Window System / p61 (0038.jp2)
  26. 5.4 New Object-Oriented Programming Techniques / p67 (0041.jp2)
  27. 5.5 Relationship to Actor Formalism / p72 (0044.jp2)
  28. 5.6 Concluding Remarks / p74 (0045.jp2)
  29. III Declarative Programming and Debugging / p75 (0045.jp2)
  30. 6 A Framework for Debugging / p77 (0046.jp2)
  31. 6.1 Introduction / p77 (0046.jp2)
  32. 6.2 An Intended Interpretation and Erroneous Results / p78 (0047.jp2)
  33. 6.3 History of A Computation and Bugs / p79 (0047.jp2)
  34. 6.4 Debugging Algorithm / p81 (0048.jp2)
  35. 6.5 Discussion / p83 (0049.jp2)
  36. 6.6 Further Notes on Algorithmic Debugging / p85 (0050.jp2)
  37. 6.7 Concluding Remarks / p87 (0051.jp2)
  38. 7 A Declarative Debugger for GHC / p89 (0052.jp2)
  39. 7.1 Introduction / p89 (0052.jp2)
  40. 7.2 Framework for Declarative Debugging / p90 (0053.jp2)
  41. 7.3 Implementation / p92 (0054.jp2)
  42. 7.4 Concluding Remarks / p104 (0060.jp2)
  43. IV AND-and OR-Parallel Programming / p105 (0060.jp2)
  44. 8 An AND-and OR-Parallel Computation Model / p107 (0061.jp2)
  45. 8.1 Introduction / p107 (0061.jp2)
  46. 8.2 An Overview of AND-OR-Parallel Computation / p108 (0062.jp2)
  47. 8.3 Operational Semantics / p110 (0063.jp2)
  48. 8.4 Branching World Scheme/Eager Copying / p113 (0064.jp2)
  49. 8.5 Coloring Scheme/Lazy Copying / p116 (0066.jp2)
  50. 8.6 Comparison / p124 (0070.jp2)
  51. 8.7 Language ANDOR-II / p125 (0070.jp2)
  52. 8.8 GHC Implementation / p127 (0071.jp2)
  53. 8.9 Related Works and Future Works / p143 (0079.jp2)
  54. 9 Parallel Distributed Planning in ANDOR-II / p149 (0082.jp2)
  55. 9.1 Introduction / p149 (0082.jp2)
  56. 9.2 A Model / p150 (0083.jp2)
  57. 9.3 A Total Plan / p154 (0085.jp2)
  58. 9.4 Concluding Remarks / p157 (0086.jp2)
  59. V Conclusion / p163 (0089.jp2)
  60. 10 Conclusion / p165 (0090.jp2)
  61. 10.1 Contribution / p165 (0090.jp2)
  62. 10.2 Future Research / p168 (0092.jp2)
  63. VI Appendix / p171 (0093.jp2)
  64. A Built-in Predicates / p173 (0094.jp2)
  65. Bibliography / p177 (0096.jp2)
  66. Publications / p187 (0101.jp2)
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各種コード

  • NII論文ID(NAID)
    500000083219
  • NII著者ID(NRID)
    • 8000000083429
  • DOI(NDL)
  • NDL書誌ID
    • 000000247533
  • データ提供元
    • NDL ONLINE
    • NDLデジタルコレクション
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