Research on CAD algorithms applied for analog IC layout generation

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博士論文

制度:新 ; 文部省報告番号:甲1019号 ; 学位の種類:博士(工学) ; 授与年月日:1994-03-15 ; 早大学位記番号:新2042 ; 理工学図書館請求番号:1733

CONTENTS / p4 (0005.jp2)
LIST OF ABBREVIATIONS / p7 (0007.jp2)
SUMMARY(ABSTRACT) / p8 (0007.jp2)
CHAPTER I.INTRODUCTION / p1 (0009.jp2)
1.1 Current CAD Approaches for VLSI / p2 (0010.jp2)
1.2 AI Tools for VLSI Design / p5 (0012.jp2)
1.3 VLSI Physical design / p7 (0013.jp2)
1.4 Objective of the Thesis / p15 (0017.jp2)
CHAPTER II.PROBLEM SPECIFICATION / p22 (0020.jp2)
2.1 Introduction / p23 (0021.jp2)
2.2 Analog Circuit Design Process / p23 (0021.jp2)
2.3 Constraints in analog circuit layout / p32 (0026.jp2)
2.4 Analog circuit layout design system / p47 (0033.jp2)
2.5 Remarks / p53 (0036.jp2)
CHAPTER III.AUTOMATIC LAYOUT ALGORITHMS FOR ANALOG CIRCUITS / p65 (0042.jp2)
3.1 Element Generation / p66 (0043.jp2)
3.2 Placement / p91 (0056.jp2)
3.3 Routing / p113 (0067.jp2)
3.4 Compaction / p131 (0076.jp2)
CHAPTER IV.INTERACTIVE LAYOUT ALGORITHMS / p141 (0081.jp2)
4.1 Introduction / p142 (0082.jp2)
4.2 Commands Specifications / p144 (0083.jp2)
4.3 Interactive Algorithms / p149 (0086.jp2)
4.4 User Interface / p162 (0092.jp2)
4.5 Rubber-Band Based Routability Testing Algorithm / p173 (0098.jp2)
CHAPTER V.ALGORITHMS IMPLEMENTATION AND EXPERIMENTAL RESULTS / p185 (0104.jp2)
5.1 Implementation Environment / p186 (0105.jp2)
5.2 Example one / p186 (0105.jp2)
5.3 Example two / p197 (0111.jp2)
5.4 Linear Objective Function Evaluation Example / p204 (0114.jp2)
CHAPTER VI.CONCLUSIONS / p211 (0118.jp2)
REFERENCES / p214 (0120.jp2)
PUBLICATION LIST / p220 (0123.jp2)