A divided word-line structure in the static RAM and its application to a 64K full CMOS RAM

• M. Yoshimoto

• K. Anami

• H. Shinohara

• T. Yoshihara

• H. Takagi

• S. Nagao

• S. Kayano

• T. Nakano

収録刊行物

• IEEE Journal of Solid-State Circuits

  IEEE Journal of Solid-State Circuits 18 (5), 479-485, 1983-10

  Institute of Electrical and Electronics Engineers (IEEE)

キーワード

• Electrical and Electronic Engineering

詳細情報

• CRID: 1363951794907099520
• NII論文ID: 80001898101
• DOI: 10.1109/jssc.1983.1051981
• ISSN: 1558173X
• ISSN: 00189200
• Web Site: http://xplorestaging.ieee.org/ielx5/4/22591/01051981.pdf?arnumber=1051981
• データソース種別:
  • Crossref
  • CiNii Articles