Yield modelling and defect tolerance in VLSI : papers presented at the International Workshop on Designing for Yield, Oxford, 1-3 July 1987

著者

• Moore, Will
• Maly, W.
• Strojwas, Andrzej J.

書誌事項

Yield modelling and defect tolerance in VLSI : papers presented at the International Workshop on Designing for Yield, Oxford, 1-3 July 1987

edited by Will Moore, Wojciech Maly, and Andrzej Strojwas

A. Hilger, c1988

注記

Includes bibliographies and index

内容説明・目次

目次

Preface. Programme committee. List of contributors. Prologue. Yield loss mechanisms and defect tolerance. Alternative perspectives (4 papers). Catastrophic Yield Loss Models (4 papers). Parametric yield loss (3 papers). Defect-tolerant architectures (4 papers). Yield prediction with defect tolerance (4 papers). Testing (3 papers). Index.

「Nielsen BookData」 より

詳細情報

• NII書誌ID(NCID): BA03911096
• ISBN:
  • 085274398X
• LCCN: 88014068
• 出版国コード: uk
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: Bristol ; Philadelphia
• ページ数/冊数: vi, 282 p. ill.
• 大きさ: 24 cm
• 分類:
  • LCC : TK7874
  • DC19 : 621.381/73
• 件名:
  • LCSH : Integrated circuits -- Very large scale integration -- Design and construction -- Congresses