Digital logic testing and simulation
著者
書誌事項
Digital logic testing and simulation
J. Wiley, c1987
- pbk.
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注記
Includes bibliographies and index
内容説明・目次
内容説明
Digital electronics has been the object of a major revolution. Circuits are shrinking in physical size while growing both in their speed and in their range of capabilities. Along with this revolution in hardware, there is a corresponding revolution in the software programs provided with the computer. This rapid advancement is not without its problems, a major one of which is testing. Because of the testing problems arising from the increasing complexity of these devices, new test strategies are emerging. Increasing emphasis is being placed on finding a defect as early as possible in the manufacturing cycle, new algorithms are being devised to create tests for logic circuits, and more attention is being given to design-for-test techniques that require active participation by the logic designers. The first six chapters of this book are concerned with traditional approaches for generating stimuli and applying them to circuits. In Chapter 7 attention is focused on methods for designing testable logic and in Chapter 8 the author looks at some algorithms designed to take advantage of the regularity of memories.
In the final chapters, trends and research are examined from different perspectives.
目次
- Combinational logic test
- sequential logic test
- simulation
- the automatic test pattern generator
- automatic test equipment
- design-for-test
- memory system design and test
- self-test and fault tolerance
- functional test and other topics. Appendix: finite fields - some definitions.
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