ASIC system design with VHDL : a paradigm
著者
書誌事項
ASIC system design with VHDL : a paradigm
（The Kluwer international series in engineering and computer science, SECS 75 . VLSI,
Kluwer Academic Publishers, c1989
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注記
Bibliography: p. 193-203
Includes index
内容説明・目次
内容説明
Beginning in the mid 1980's, VLSI technology had begun to advance in two directions. Pushing the limit of integration, ULSI (Ultra Large Scale Integration) represents the frontier of the semiconductor processing technology in the campaign to conquer the submicron realm. The application of ULSI, however, is at present largely confined in the area of memory designs, and as such, its impact on traditional, microprocessor-based system design is modest. If advancement in this direction is merely a natural extrapolation from the previous integration generations, then the rise of ASIC (Application-Specific Integrated Circuit) is an unequivocal signal that a directional change in the discipline of system design is in effect. In contrast to ULSI, ASIC employs only well proven technology, and hence is usually at least one generation behind the most advanced processing technology. In spite of this apparent disadvantage, ASIC has become the mainstream of VLSI design and the technology base of numerous entrepreneurial opportunities ranging from PC clones to supercomputers. Unlike ULSI whose complexity can be hidden inside a memory chip or a standard component and thus can be accommodated by traditional system design methods, ASIC requires system designers to master a much larger body of knowledge spanning from processing technology and circuit techniques to architecture principles and algorithm characteristics. Integrating knowledge in these various areas has become the precondition for integrating devices and functions into an ASIC chip in a market-oriented environment. But knowledge is of two kinds.
目次
1. Introduction.- 1.1 Problem Statement.- 1.2 Approach.- 1.3 Organization of this Book.- 2. Background.- 2.1 The ASIC Challenge.- 2.2 Computer Architecture Design for Robotic Control.- 2.3 Robotic Kinematics.- 2.4 Summary.- 3. A Conceptual Framework for ASIC Design.- 3.1 The Nature of ASIC Design.- 3.2 The ASIC Design Process.- 3.3 The ASIC Design Hyperspace.- 3.4 The ASIC Design Repertoire.- 3.5 Summary.- 4. The IKS Chip Design Paradigm.- 4.1 Introduction.- 4.2 An ASIC Architecture Design Methodology.- 4.3 The IKS Chip Architecture Design.- 4.4 Summary.- 5. VHDL Simulation of the IKS Chip.- 5.1 Introduction.- 5.2 VHDL Fundamentals.- 5.3 Simulation Objective and Modeling Approach.- 5.4 VHDL Description of the IKS Chip.- 5.5 Simulation Results.- 5.6 Summary.- 6. Conclusion.- 6.1 Summary.- 6.2 Implications and Future Research.- Appendices.- Appendix A. The Closed Form IKS Algorithm for the PUMA.- Appendix B. The IKS Algorithm in Pseudocodes.- Appendix C. Control Signal Definition.- Appendix D. The MACC Encoding Scheme and Code-Maps.- Appendix E. The MACC Microcode for Computing the IKS.
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