Algorithmic and register-transfer level synthesis : the system architect's workbench

Author(s)

• Thomas, D. E. (Donald E.)

Bibliographic Information

Algorithmic and register-transfer level synthesis : the system architect's workbench

by D.E. Thomas ... [et al.]

（The Kluwer international series in engineering and computer science, SECS 85 . VLSI, computer architecture, and digital signal processing）

Kluwer Academic Publishers, c1990

Note

Includes bibliographical references

Includes index

Details

• NCID: BA08020570
• ISBN:
  • 0792390539
• LCCN: 89028031
• Country Code: us
• Title Language Code: eng
• Text Language Code: eng
• Place of Publication: Boston
• Pages/Volumes: ix, 305 p.
• Size: 25 cm
• Classification:
  • LCC : TK7874
  • DC20 : 621.39/5
• Subject Headings:
  • LCSH : Integrated circuits -- Design and construction
  • LCSH : Computer architecture
• Parent Bibliography ID:
  • BA0004729X