Formal specification and verification in VLSI design

書誌事項

Formal specification and verification in VLSI design

Bruce S. Davie

(Edinburgh information technology series, 8)

Edinburgh University Press, c1990

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注記

Includes bibliographical references (p. 184-193) and index

内容説明・目次

内容説明

This volume describes an approach to computer hardware design based on behavioural hardware description languages, which enable a designer to be confident of a design's suitability at every stage of the process. The text uses examples ranging in complexity from logic gates to the small computer, and examines the issues related to the writing of accurate specifications and the verification of designs. It discusses the necessary features of hardware description languages and the issues involved in their development. Formal specification techniques, both from industry and academia, are examined in detail with particular emphasis on higher-order logic and the Circal framework. The problems of verifying timing properties and of dealing with uncertainty in specifications are also explored.

目次

  • Hardware descriptive languages - describing behaviour
  • a selection of languages
  • CIRCAL
  • enhanced CIRCAL
  • specification techniques, SuperC
  • manual design
  • transformation
  • automatic design
  • validation - simulation
  • a simple computer - informal and formal specification
  • constraints - introductory examples and definitions
  • specification of constraints
  • the uses of constraints
  • constraints and SuperC.

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