High level synthesis of ASICs under timing and synchronization constraints

著者

• Ku, David C., 1964
• De Micheli, G.

書誌事項

High level synthesis of ASICs under timing and synchronization constraints

by David C. Ku and Giovanni De Micheli

（The Kluwer international series in engineering and computer science, SECS 177）

Kluwer Academic Publishers, 1992

注記

Includes bibliographical references and index

詳細情報

• NII書誌ID(NCID): BA17263653
• ISBN:
  • 0792392442
• LCCN: 92010571
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: Boston
• ページ数/冊数: xiii, 294 p.
• 大きさ: 24 cm
• 分類:
  • LCC : TK7874.6
  • DC20 : 621.381/5
• 件名:
  • LCSH : Application specific integrated circuits -- Design and construction -- Data processing
  • LCSH : computer-aided design
• 親書誌ID:
  • BA0004729X