A VHDL primer
著者
書誌事項
A VHDL primer
(Prentice Hall series in innovative technology)
Prentice Hall, c1992
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注記
"AT&T"
Includes bibliographical references (p. 247-248) and index
内容説明・目次
内容説明
An introduction to VHDL, clarifying the language by presenting a subset of VHDL so readers can quickly start writing models. It presents the most common usage instead of describing the complete syntax of language constructs. Describing the basic elements of the language, the author includes a quick tutorial to demonstrate the primary modelling features. It also provides illustrative examples that explain the different formulations of the language constructs and their semantics.
目次
- A tutorial
- basic language elements
- behavioural modelling
- dataflow modelling
- structural modelling
- generics and configurations
- subprograms and overloading
- packages and libraries
- advanced features
- model simulation
- hardware modelling examples. Appendices: Predefined environment
- syntax reference.
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