Transputer/Occam Japan 4 : proceedings of the 4th Transputer/Occam International Conference, 4-5 June 1992, Tokyo, Japan
著者
書誌事項
Transputer/Occam Japan 4 : proceedings of the 4th Transputer/Occam International Conference, 4-5 June 1992, Tokyo, Japan
（Transputer and occam engineering series, v. 27）
IOS Press, 1992
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注記
Includes references
内容説明・目次
内容説明
Comprises discussions presented by leading international experts on the application of transputers. Coverage includes formalism, specifications and design, concurrent systems development, parallel algorithms, real time systems and applications.
目次
- Part 1 Invited papers: trends in massively parallel computing, Francis Wray
- formal routes from specification to Occam, David Crowe and Peter S. Clark
- C-DAC India's supercomputing initiative, Ashok Joshi
- T9000 updates and Occam3. Part 2 Parallel architectures: a scalable cellular array architecture, Paul Cockshott, et al
- real-time message routing with virtual cut-through in transputer networks, S.W. Lau and Francis C.M. Lau. Part 3 Parallel algorithm on a transputer network (1): Gaussian elimination of symmetric, positive definite, banded systems on transputer networks, Fida H. Chishti, et al
- parallel FFT algorithms on an eight-neighbour processor array, Kuninobu Tanno and Susumu Horiguchi
- experimental evaluation of node/variable-selection and load-balancing strategies in parallel branch-and-bound algorithms for solving 0-1 knapsack problems on a transputer network, Toshimasa Watanabe, et al. Part 4 Parallel signal processing: the approach of the real-time underwater data transmission system based on scale-space filtering, Kazuyoshi Mori, et al
- an integrated car navigation system using a single processor for GPS signal processing for positioning, for map diaplay and for reporting, Philip G. Mattos. Part 5 Framework for parallel implementation: synergetic computation for constraint satisfaction problems involving continuous and fuzzy variables by using Occam, Osamu Katai, et al
- reduction by message passing and its implementation on transputer network, Hiroshi Nunokawa and Shoichi Noguchi. Part 6 Parallel algorithms on a transputer network (2): development of the parallel particle-in-cell code on a transputer network system, Masami Matsumoto
- development of the parallel modified Lax-Wendroff algorithm, Akitsugu Takeuchi, et al
- logic simulation algorithm on network of transputers, S. Sundaram and L.M. Patnaik. Part 7 Transputer system: full digital control of power electronics converters using transputers, L.Jr. Matakas, et al
- a modular, high speed transputer based data acquisition system, P.M. Neal, et al.
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