Mixed-mode simulation and analog multilevel simulation
Author(s)
Bibliographic Information
Mixed-mode simulation and analog multilevel simulation
（The Kluwer international series in engineering and computer science, . VLSI,
Kluwer Academic, 1994
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Note
Includes bibliographical references and index
Description and Table of Contents
Description
Mixed-Mode Simulation and Analog Multilevel Simulation addresses the problems of simulating entire mixed analog/digital systems in the time-domain. A complete hierarchy of modeling and simulation methods for analog and digital circuits is described.
Mixed-Mode Simulation and Analog Multilevel Simulation also provides a chronology of the research in the field of mixed-mode simulation and analog multilevel simulation over the last ten to fifteen years. In addition, it provides enough information to the reader so that a prototype mixed-mode simulator could be developed using the algorithms in this book.
Mixed-Mode Simulation and Analog Multilevel Simulation can also be used as documentation for the SPLICE family of mixed-mode programs as they are based on the algorithms and techniques described in this book.
Table of Contents
Preface. 1: Introduction. 1.1. The Simulation Problem. 1.2. Levels of Simulation for Digital Circuits. 1.3. Levels of Simulation for Analog Circuits. 1.4. Mixed-Mode and Analog Multilevel Simulation. 1.5. Basic Issues in Mixed-Mode Simulation. 1.6. A Survey of Existing Simulators. 1.7. Outline of the Book. 2: Electrical Simulation Techniques. 2.1. Equation Formulation. 2.2. Standard Techniques for Transient Analysis. 2.3. Time-Step Control: Theoretical Issues. 2.4. Time-Step Control: Implementation Issues. 3: Relaxation-Based Simulation Techniques. 3.1. Latency and Multirate Behavior. 3.2. Overview of Relaxation Methods. 4: Iterated Timing Analysis. 4.1. Equation Flow for Nonlinear Relaxation. 4.2. Timing Analysis Algorithms. 4.3. Splice 1.7 -- Fixed Time-Step ITA. 4.4. Circuit Partitioning. 4.5. Global-Variable Time-Step Control. 4.6. Electrical Events and Event Scheduling. 5: Gate-Level Simulation. 5.1. Introduction. 5.2. Evolution of Logic States. 5.3. Characterization of Switching Properties. Subject Index.
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