ISA system architecture

著者

書誌事項

ISA system architecture

Tom Shanley and Don Anderson ; edited and revised by John Swindle

Addison-Wesley, c1995

3rd ed.

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注記

2nd print : 517 p.

Includes index

内容説明・目次

内容説明

ISA System Architecture describes the hardware architecture of ISA (Industry Standard Architecture), providing a clear, concise explanation of an ISA system in detail. The authors provide a comprehensive treatment of the bus including: -bus cycles -addressing -I/O -RAM, ROM, and cache memory -cache architectures -decode and reset logic -interrupts -system kernel -bus mastering -DMA -RTC and configuration RAM If you design or test hardware or software that involves ISA, ISA System Architecture is an essential, time-saving tool. The PC System Architecture Series is a crisply written and comprehensive set of guides to the most important PC hardware standards. Each title explains from a programmer's perspective the architecture, features, and operations of systems built using one particular type of chip or hardware specification.

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詳細情報

  • NII書誌ID(NCID)
    BA25825216
  • ISBN
    • 0201409968
  • LCCN
    95163157
  • 出版国コード
    us
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    Reading, Mass.
  • ページ数/冊数
    xxv, 515 p.
  • 大きさ
    24 cm
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