Digital systems testing and testable design

Bibliographic Information

Digital systems testing and testable design

Miron Abramovici, Melvin A. Breuer, Arthur D. Friedman

IEEE Press , Institute of Electrical and Electronics Engineers, c1990

Available at  / 30 libraries

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Note

Includes bibliographical references (p. 644-645) and index

IEEE order no. PC04168

Rev. print. publisher: IEEE and Wiley-Interscience

Description and Table of Contents

Description

This updated printing of the leading text and reference in digital systems testing and testable design provides comprehensive, state-of-the-art coverage of the field. Included are extensive discussions of test generation, fault modeling for classic and new technologies, simulation, fault simulation, design for testability, built-in self-test, and diagnosis. Complete with numerous problems, this book is a must-have for test engineers, ASIC and system designers, and CAD developers, and advanced engineering students will find this book an invaluable tool to keep current with recent changes in the field.

Table of Contents

Preface. How This Book Was Written. Introduction. Modeling. Logic Simulation. Fault Modeling. Fault Simulation. Testing For Single Stuck Faults. Testing For Bridging Faults. Functional Testing. Design For Testability. Compression Techniques. Built-In Self-Test. Logic-Level Diagnosis. Self-Checking Design. PLA Testing. System-Level Diagnosis. Index.

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