Surviving the design of a 200 MHz RISC microprocessor : lessons learned
著者
書誌事項
Surviving the design of a 200 MHz RISC microprocessor : lessons learned
IEEE Computer Society Press, c1997
大学図書館所蔵 件 / 全8件
-
該当する所蔵館はありません
- すべての絞り込み条件を解除する
注記
Includes bibliographical references and index
内容説明・目次
内容説明
Describes the design of a 32-bit RISC, developed through the first DARPA's effort to create a 200 MHz processor on a VLSI chip. The main purpose of this book is to take you through all phases of this project and to cover all theoretical and technical details necessary for the creation of the final architecture and design. Its text places special emphasis on the research and development methodology utilized in the project. The methodology of this project includes the following elements: creation of a candidate architecture, comparative testing on the functional level, selection and final refinement of the best architecture, transformation from the architecture level to the design level, logical and timing testing of the design, and its presentation for fabrication. The book also devotes special emphasis to the software tools that are in use in the project and to RISC architectures that serves as the baseline for the project.
「Nielsen BookData」 より
