Proceedings : International Workshop on Memory Technology, Design and Testing, August 24-25, 1998, San Jose, California, USA

著者

• IEEE International Workshop on Memory Technology, Design, and Testing
• Lepejian, D.
• IEEE Computer Society. Test Technology Technical Committee
• IEEE Computer Society. Technical Committee on VLSI

書誌事項

Proceedings : International Workshop on Memory Technology, Design and Testing, August 24-25, 1998, San Jose, California, USA

sponsored by IEEE Computer Society Technical Committee on Test Technology, Technical Committee on VLSI ; in cooperation with IEEE Solid State Circuit Society ; edited by D. Lepejian, ... [et al.]

IEEE Computer Society Press, c1998

タイトル別名

98TB100236

Memory Technology, Design and Testing

MTDT'98

注記

"IEEE Order Plan Catalog Number 98TB100236"--T.p. verso

"IEEE Computer Society Order Number PR08494"--T.p. verso

Includes bibliographical references and index

詳細情報

• NII書誌ID(NCID): BA43731238
• ISBN:
  • 0818684941
• LCCN: 97202128
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: Los Alamitos, Calif.
• ページ数/冊数: ix, 131 p.
• 大きさ: 28 cm
• 分類:
  • LCC : TK7895.M4
  • DC21 : 621.39/732
• 件名:
  • LCSH : Semiconductor storage devices -- Testing -- Congresses
  • LCSH : Random access memory -- Congresses