Phase-locked loops : design, simulation, and applications

書誌事項

Phase-locked loops : design, simulation, and applications

Roland E. Best

McGraw-Hill, c1999

4th ed

大学図書館所蔵 件 / 8

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注記

Includes bibliographical references(p.401-402) and index

内容説明・目次

内容説明

Phase-locked loops are a type of circuit used to "lock on" to frequencies in telecommunication systems. The fourth edition of this guide brings readers up to date with innovations in the field, with new material on digital PLLs and a new chapter on PLL intergrated circuits.

目次

Introduction to PLLs. The Linear PLL (LPLL). The Classical Digital PLL (DPLL). The All-Digital PLL (ADPLL). The Software PLL (SPLL). The PLL in Communications. State of the Art of Commercial PLL Integrated Circuits. Measuring PLL Parameters. Appendices: A: The Pull-In Process. B: The Laplace Transform. C: Digital Filter Basics.

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詳細情報

  • NII書誌ID(NCID)
    BA45170197
  • ISBN
    • 0071349030
  • LCCN
    99032414
  • 出版国コード
    us
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    New York
  • ページ数/冊数
    x, 408 p.
  • 大きさ
    25 cm.
  • 付属資料
    1 computer laser optical disc (4 3/4 in.)
  • 分類
  • 件名
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