Proceedings, 2000 International Conference on Parallel Architectures and Compilation Techniques, October 15-19, 2000, Philadelphia, Pennsylvania

Author(s)

• IFIP WG10.3 Working Conference on Parallel Architectures and Compilation Techniques
• IEEE Computer Society. Technical Committee on Computer Architecture
• IEEE Computer Society. Technical Committee on Parallel Processing
• SIGARCH
• IBM
• Intel
• SGI

Bibliographic Information

Proceedings, 2000 International Conference on Parallel Architectures and Compilation Techniques, October 15-19, 2000, Philadelphia, Pennsylvania

sponsored by IEEE Technical Committee on Computer Architecture, IEEE Technical Committee on Parallel Processing ; in cooperation with ACM SIGARCH, IBM, Intel, SGI

IEEE Computer Society, c2000

• : pbk

Other Title

2000 International Conference on Parallel Architectures and Compilation Techniques, October 15-19, 2000, Philadelphia, Pennsylvania

PR00622

PACT 2000

Note

"IEEE computer society order number PR00622"--T.p. verso

Description and Table of Contents

Description

A collection of papers from the International Conference on Parallel Architectures and Compilation Techniques (PACT 2000). It addresses: register allocation and analysis; architectural design; optimizations and opportunities; high performance memory techniques; branch prediction; and more.

Table of Contents

• Register Allocation and Analysis
• Architectural Design
• Optimizations and Opportunities
• High Performance Memory Techniques
• Speculation and Prediction
• Branch Prediction
• Parallel Computation
• Applications
• Instruction Scheduling

by "Nielsen BookData"

• NCID: BA50297233
• ISBN:
  • 0769506224
• Country Code: us
• Title Language Code: eng
• Text Language Code: eng
• Place of Publication: Los Alamitos, Calif.
• Pages/Volumes: xi, 309 p.
• Size: 28 cm