Computer systems organization & architecture
著者
書誌事項
Computer systems organization & architecture
Addison-Wesley, 2001
- タイトル別名
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Computer systems organization and architecture
大学図書館所蔵 全2件
  青森
  岩手
  宮城
  秋田
  山形
  福島
  茨城
  栃木
  群馬
  埼玉
  千葉
  東京
  神奈川
  新潟
  富山
  石川
  福井
  山梨
  長野
  岐阜
  静岡
  愛知
  三重
  滋賀
  京都
  大阪
  兵庫
  奈良
  和歌山
  鳥取
  島根
  岡山
  広島
  山口
  徳島
  香川
  愛媛
  高知
  福岡
  佐賀
  長崎
  熊本
  大分
  宮崎
  鹿児島
  沖縄
  韓国
  中国
  タイ
  イギリス
  ドイツ
  スイス
  フランス
  ベルギー
  オランダ
  スウェーデン
  ノルウェー
  アメリカ
注記
Includes index
内容説明・目次
内容説明
This book presents material that is appropriate for an undergraduate course on computer organization and architecture and that covers the design of CPUs, microprocessors, and computer systems. It has been heralded for its presentation style and pedagogy which make this difficult material understandable for students without sacrificing the essential elements of learning computer/architecture/organization. One hallmark feature of the author's pedagogy is the use of the Very Simple CPU and the Relatively Simple CPU. The Very Simple CPU, introduced in Chapter 6, illustrates CPU design concepts without getting too complex. The following chapter introduces the Relatively Simple CPU, which builds on the Very Simple CPU's design principles and illustrates additional concepts with gradually more complexity. The remaining chapters show the connection between their respective concepts and their relation to the Relatively Simple CPU. Students also see how these ideas are used outside the classroom, as each chapter features a real-world machine on which the discussed organization and architecture concepts are implemented.
Computer Systems Organization and Architecture supports a platform-independent hands-on approach to learning. It is accompanied by simulation software for the Relatively Simple CPU, which allows students to enter a program written in the assembly language of the CPU and simulate its execution. This allows students to see the internal organization of the CPU, how data moves about within the CPU, and how the control unit generates the control signals that coordinate activity within the CPU.
目次
(Each chapter contains "Summary" and "Problems".)I. DIGITAL LOGIC AND FINITE STATE MACHINES.
1. Digital Logic Fundamentals.
Boolean Algebra.
Basic Combinatorial Logic.
More Complex Combinatorial Components.
Combinatorial Circuit Designs.
Basic Sequential Components.
More Complex Sequential Components.
Programmable Logic Devices.
2. Introduction to Finite State Machines.
State Diagrams and State Tables.
Mealy and Moore Machines.
Designing State Diagrams.
From State Diagram to Implementation.
Practical Considerations.
II. COMPUTER ORGANIZATION AND ARCHITECTURE.
3. Instruction Set Architectures.
Levels of Programming Languages.
Assembly Language Instructions.
Instruction Set Architecture Design.
A Relatively Simple Instruction Set Architecture.
The 8085 Microprocessor Instruction Set Architecture.
4. Introduction to Computer Organization.
Basic Computer Organization.
CPU Organization.
Memory Subsystem Organization and Interfacing.
I/O Subsystem Organization and Interfacing.
A Relatively Simple Computer.
An 8085-based Computer.
5. Register Transfer Languages.
Micro-operations and Register Transfer Language.
Using RTL to Specify Digital Systems.
More Complex Digital Systems and RTL.
VHDL-VHSIC Hardware Description Language.
6. CPU Design.
Specifying a CPU.
Design and Implementation of a Very Simple CPU.
Design and Implementation of a Relatively Simple CPU.
Shortcomings of the Simple CPUs.
Internal Architecture of the 8085 Microprocessor.
7. Microsequencer Control Unit Design.
Basic Microsequencer Design.
Design and Implementation of a Very Simple Microsequencer.
Design and Implementation of a Relatively Simple Microsequencer.
Reducing the Number of Microinstructions.
Microprogrammed Control vs. Hardwired Control.
A (Mostly) Microcoded CPU: The Pentium Microprocessor.
8. Computer Arithmetic.
Unsigned Notation.
Signed Notation.
Binary Coded Decimal.
Specialized Arithmetic Hardware.
Floating Point Numbers.
The IEEE 754 Floating Point Standard.
9. Memory Organization.
Hierarchical Memory Systems.
Cache Memory.
Virtual Memory.
Beyond the Basics of Cache and Virtual Memory.
Memory Management in a Pentium/Windows Personal Computer.
10. Input/Output Organization.
Asynchronous Data Transfers.
Programmed I/O.
Interrupts.
Direct Memory Access.
I/O Processors.
Serial Communication.
Serial Communication Standards.
III. ADVANCED TOPICS.
11. Reduced Instruction Set Computing.
RISC Rationale.
RISC Instruction Sets.
Instruction Pipelines and Register Windows.
Instruction Pipeline Conflicts.
RISC vs. CISC.
The Itanium Microprocessor.
12. Introduction to Parallel Processing.
Parallelism in Uniprocessor Systems.
Organization of Multiprocessor Systems.
Communication in Multiprocessor Systems.
Memory Organization in Multiprocessor Systems.
Multiprocessor Operating Systems and Software.
Parallel Algorithms.
Alternative Parallel Architectures.
Index.
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