The Verilog hardware description language

Bibliographic Information

The Verilog hardware description language

Donald E. Thomas, Philip R. Moorby

Kluwer Academic Publishers, c2002

5th ed

Other Title

The VerilogR hardware description language

Thomas & Moorby's the Verilog hardware description language

Available at  / 10 libraries

Search this Book/Journal

Note

Includes index

Description and Table of Contents

Description

xv From the Old to the New xvii Acknowledgments xxi 1 Verilog - A Tutorial Introduction 1 Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 11 Behavioral Modeling of Combinational Circuits Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 14 Procedural Modeling of Clocked Sequential Circuits Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("

Table of Contents

Verilog - A Tutorial Introduction.- Logic Synthesis.- Behavioral Modeling.- Concurrent Processes.- Module Hierarchy.- Logic Level Modeling.- Cycle-Accurate Specification.- Advanced Timing.- User-Defined Primitives.- Switch Level Modeling.- Projects.

by "Nielsen BookData"

Details

Page Top