Digital clocks for synchronization and communications

著者

書誌事項

Digital clocks for synchronization and communications

Masami Kihara, Sadayasu Ono, Pekka Eskelinen

(The Artech House telecommunication library)

Artech House, c2003

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注記

Includes bibliographical references and index

内容説明・目次

内容説明

This handbook seeks to provide an in-depth and practical understanding of the digital clock technologies used in building today's telecommunications networks. Covering critical details on the PLL (phase-locked loop) technique for clock synchronization and generation, and the DDS (direct digital synthesizer) technique for clock generation, the work is designed to help the reader achieve synchronization in high-speed networks and frequency stabilization in portable equipment. Discussing both wired and wireless networks, the volume looks at the combination of circuits and systems to give you a more thorough understanding of important design requirements.

目次

Introduction to Clocks. Basic Clock Synchronization and Generation. Signal Processing Fundamentals. Introduction to PLL. PLL Characteristic Analysis. Simulation of Digital PLL. Clock Systems in Networks. Digital Synchronization. PLL LSI. Frequency Generation System. DDS Circuit Configuration and Characteristics. DDS Applications. Noise in Clocks. Noise Measurement. Noise Characteristics in Circuits and Devices. Operational and Environmental Effects on Noise Characteristics. Appendixes.

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