A parallel algorithm synthesis procedure for high-performance computer architectures

著者

• Dunn, Ian N.
• Meyer, Gerard G. L.

書誌事項

A parallel algorithm synthesis procedure for high-performance computer architectures

Ian N. Dunn and Gerard G.L. Meyer

（Series in computer science）

Kluwer Academic/Plenum Publishers, c2003

注記

Includes bibliographical references (p. 103-106) and index

HTTP:URL=http://www.loc.gov/catdir/toc/fy042/2003044716.html Information=Table of contents

詳細情報

• NII書誌ID(NCID): BA67521342
• ISBN:
  • 0306477432
• LCCN: 2003044716
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: New York
• ページ数/冊数: xi, 108 p.
• 大きさ: 24 cm
• 分類:
  • LCC : QA76.642
  • DC21 : 005.2/75
• 件名:
  • LCSH : Parallel programming (Computer science)
  • LCSH : Parallel algorithms
  • LCSH : Electronic data processing -- Distributed processing
  • LCSH : High performance computing
  • LCSH : Computer architecture
• 親書誌ID:
  • BA63504840