Chip design for submicron VLSI : CMOS layout and simulation

Bibliographic Information

Chip design for submicron VLSI : CMOS layout and simulation

John P. Uyemura

Thomson, c2006

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Note

Includes bibliographical references and index

Details
  • NCID
    BA71831809
  • ISBN
    • 053446629X
  • Country Code
    cn
  • Title Language Code
    eng
  • Text Language Code
    eng
  • Place of Publication
    Toronto
  • Pages/Volumes
    xvi, 411 p.
  • Size
    25 cm.
  • Attached Material
    1 computer optical disc (4 3/4 in.)
  • Subject Headings
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