Formal methods and software engineering : 9th International Conference on Formal Engineering Methods, ICFEM 2007, Boca Raton, FL, USA, November 14-15, 2007 : proceedings

著者

書誌事項

Formal methods and software engineering : 9th International Conference on Formal Engineering Methods, ICFEM 2007, Boca Raton, FL, USA, November 14-15, 2007 : proceedings

Michael Butler, Michael G. Hinchey, María M. Larrondo-Petrie (eds.)

(Lecture notes in computer science, 4789)

Springer, c2007

タイトル別名

ICFEM 2007

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注記

Includes bibliographies and index

内容説明・目次

内容説明

This book constitutes the refereed proceedings of the 9th International Conference on Formal Engineering Methods, ICFEM 2007, held in Boca Raton, Florida, USA, November 14-15, 2007. The 19 revised full papers together with two invited talks presented were carefully reviewed and selected from 38 submissions. The papers address all current issues in formal methods and their applications in software engineering. The papers are organized in topical sections.

目次

Invited Talks.- A System Development Process with Event-B and the Rodin Platform.- Challenges in Software Certification.- Security and Knowledge.- Integrating Formal Methods with System Management.- Formal Engineering of XACML Access Control Policies in VDM++.- A Verification Framework for Agent Knowledge.- Embedded Systems.- From Model-Based Design to Formal Verification of Adaptive Embedded Systems.- Machine-Assisted Proof Support for Validation Beyond Simulink.- VeSTA: A Tool to Verify the Correct Integration of a Component in a Composite Timed System.- Testing.- Integrating Specification-Based Review and Testing for Detecting Errors in Programs.- Testing for Refinement in CSP.- Reducing Test Sequence Length Using Invertible Sequences.- Automated Analysis.- Model Checking with SAT-Based Characterization of ACTL Formulas.- Automating Refinement Checking in Probabilistic System Design.- Model Checking in Practice: Analysis of Generic Bootloader Using SPIN.- Model Checking Propositional Projection Temporal Logic Based on SPIN.- Hardware.- A Denotational Semantics for Handel-C Hardware Compilation.- Automatic Generation of Verified Concurrent Hardware.- Modeling and Verification of Master/Slave Clock Synchronization Using Hybrid Automata and Model-Checking.- Concurrency.- Efficient Symbolic Execution of Large Quantifications in a Process Algebra.- Formalizing SANE Virtual Processor in Thread Algebra.- Calculating and Composing Progress Properties in Terms of the Leads-to Relation.- Erratum.- Erratum to: Challenges in Software Certification.

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