VLSI-SoC: research trends in VLSI and systems on chip : Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2006), October 16-18, 2006, Nice, France

Bibliographic Information

VLSI-SoC: research trends in VLSI and systems on chip : Fourteenth International Conference on Very Large Scale Integration of System on Chip (VLSI-SoC 2006), October 16-18, 2006, Nice, France

edited by Giovanni De Micheli, Salvador Mir, Ricardo Reis

(The International Federation for Information Processing, 249)

Springer, c2008

Available at  / 2 libraries

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Description and Table of Contents

Description

This book contains extended and revised versions of the best papers presented during the fourteenth IFIP TC 10/WG 10.5 International Conference on Very Large Scale Integration. This conference provides a forum to exchange ideas and show industrial and academic research results in microelectronics design. The current trend toward increasing chip integration and technology process advancements brings about stimulating new challenges both at the physical and system-design levels.

Table of Contents

  • Architectures for High Dynamic Range, High Speed Image Sensor Readout Circuits.- Oversampled Time Estimation Techniques for Precision Photonic Detectors.- Innovative Optoeletronic Approaches to Biomolecular Analysis with Arrays of Silicon Devices.- Electronic Detection of DNA Adsorption and Hybridization.- Probabilistic amp
  • Statistical Design-the Wave of the Future.- A CMOS Mixed-Mode Sample-and-Hold Circuit for Pipelined ADCs.- Probabilistic Design: A Survey of Probabilistic CMOS Technology and Future Directions for Terascale IC Design.- Reliability Issues in Deep Deep Submicron Technologies: Time-Dependent Variability and its Impact on Embedded System Design.- Soft Error Resilient System Design through Error Correction.- Library Compatible Variational Delay Computation.- A Power-Efficient Methodology for Mapping Applications on Multi-Processor, System-on-Chip Architectures.- Frequency and Speed Setting for Energy Conservation in Autonomous Mobile Robots.- Configurable On-Line Global Energy Optimization in Multi-Core Embedded Systems Using Principles of Analog Computation.- Logic Synthesis of EXOR Projected Sum of Products.- A Method for I/O Pins Partitioning Targeting 3D VLSI Circuits.- CAT Platform for Analogue and Mixed-Signal Test Evaluation and Optimization.- Broadside Transition Test Generation for Partial Scan Circuits through Stuck-at Test Generation.- Comparison of an AEthereal Network on Chip and Traditional Interconnects - Two Case Studies.- Designing Routing and Message-Dependent Deadlock Free Networks on Chips.- Dynamic Reconfigurable Architecture Exploration based on Parameterized Reconfigurable Processor Model.- Human++: Emerging Technology for Body Area Networks.

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Details

  • NCID
    BA84370833
  • ISBN
    • 9780387749082
  • LCCN
    2007934346
  • Country Code
    us
  • Title Language Code
    eng
  • Text Language Code
    eng
  • Place of Publication
    New York
  • Pages/Volumes
    x, 397 p.
  • Size
    25 cm
  • Classification
  • Parent Bibliography ID
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