Logic synthesis for FSM-based control units

著者

    • Barkalov, Alexander
    • Titarenko, Larysa

書誌事項

Logic synthesis for FSM-based control units

Alexander Barkalov and Larysa Titarenko

(Lecture notes in electrical engineering, 53)

Springer, c2009

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注記

Includes bibliographical references and index

内容説明・目次

内容説明

Tremendous achievements in the area of semiconductor electronics turn - croelectronics into nanoelectronics. Actually, we observe a real technical boom connected with achievements in nanoelectronics. It results in devel- mentofverycomplexintegratedcircuits,particularlythe?eldprogrammable logic devices (FPLD). Up-to-day FPLD chips are so huge, that it is enough only one chip to implement a really complex digital system including a da- path and a control unit. Because of the extreme complexity of modern - crochips, it is very important to develop e?ective design methods oriented on particular properties of logic elements. The development of digital s- tems with use of FPLD microchips is not possible without use of di?erent hardware description languages(HDL), such as VHDL and Verilog. Di?erent computer-aided design tools (CAD) are wide used to develop digital system hardware. As majorityof researchespoint out, the design processis nowvery similar to the process of program development. It allows a researcher to pay more attention to some speci?c problems, where there are no standard f- mal methods of their solution. But application of all these achievements does not guaranteeper sedevelopmentof some competitiveelectronic product,- pecially in the acceptable time-to-market. This problem solution is possible only if a researcher possesses fundamental knowledge of a design process and knows exactly the mode of operation of industrial CAD tools in use. As it is known, any digital system can be represented as a composition of a da- path and a control unit.

目次

Hardwired Interpretation of Control Algorithms.- Matrix Realization of Control Units.- Evolution of Programmable Logic.- Optimization for Logic Circuit of Mealy FSM.- Optimization for Logic Circuit of Moore FSM.- FSM Synthesis with Transformation of GSA.- FSM Synthesis with Object Code Transformation.- FSM Synthesis with Elementary Chains.- Conclusion.

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詳細情報

  • NII書誌ID(NCID)
    BA91600092
  • ISBN
    • 9783642043086
  • LCCN
    2009934355
  • 出版国コード
    gw
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    Berlin
  • ページ数/冊数
    xix, 233 p.
  • 大きさ
    25 cm
  • 親書誌ID
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