Closing the power gap between ASIC & custom : tools and techniques for low power design

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Closing the power gap between ASIC & custom : tools and techniques for low power design

David Chinnery, Kurt Keutzer

Springer, c2007

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注記

Includes bibliographical references and index

内容説明・目次

内容説明

Explains how to use low power design in an automated design flow, and examine the design time and performance trade-offs Includes the latest tools and techniques for low power design applied in an ASIC design flow Focuses on low power in an automated design methodology, a much neglected area

目次

Overview of the Factors Affecting the Power Consumption.- Pipelining to Reduce the Power.- Voltage Scaling.- Methodology to Optimize Energy of Computation for SOCs.- Linear Programming for Gate Sizing.- Linear Programming for Multi-Vth and Multi-Vdd Assignment.- Power Optimization using Multiple Supply Voltages.- Placement for Power Optimization.- Power Gating Design Automation.- Verification For Multiple Supply Voltage Designs.- Winning the Power Struggle in an Uncertain Era.- Pushing ASIC Performance in a Power Envelope.- Low Power ARM 1136JF-S Design.

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