The Verilog hardware description language

著者

• Thomas, D. E. (Donald E.)
• Moorby, Philip R.

書誌事項

The Verilog hardware description language

Donald Thomas, Philip Moorby

Springer, c2008

5th ed

• : pbk

タイトル別名

The VerilogR hardware description language

Thomas & Moorby's the Verilog hardware description language

注記

Includes index

内容説明・目次

内容説明

XV From the Old to the New xvii Acknowledgments xx| Verilog A Tutorial Introduction Getting Started 2 A Structural Description 2 Simulating the binaryToESeg Driver 4 Creating Ports For the Module 7 Creating a Testbench For a Module 8 Behavioral Modeling of Combinational Circuits 11 Procedural Models 12 Rules for Synthesizing Combinational Circuits 13 Procedural Modeling of Clocked Sequential Circuits 14 Modeling Finite State Machines 15 Rules for Synthesizing Sequential Systems 18 Non-Blocking Assignment ("

目次

Verilog - A Tutorial Introduction.- Logic Synthesis.- Behavioral Modeling.- Concurrent Processes.- Module Hierarchy.- Logic Level Modeling.- Cycle-Accurate Specification.- Advanced Timing.- User-Defined Primitives.- Switch Level Modeling.- Projects.

「Nielsen BookData」 より

詳細情報

• NII書誌ID(NCID): BB01078478
• ISBN:
  • 9780387849300
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: New York
• ページ数/冊数: xxi, 381 p.
• 大きさ: 24 cm
• 付属資料: 1 CD-ROM (4 3/4 in.)
• 分類:
  • LCC : TK7885.7
  • DC21 : 621.39/2
• 件名:
  • LCSH : Verilog (Computer hardware description language)