Processor and system-on-chip simulation

著者

書誌事項

Processor and system-on-chip simulation

Rainer Leupers, Olivier Temam, editors

Springer, c2010

大学図書館所蔵 件 / 3

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注記

Includes bibliographical references and index

内容説明・目次

内容説明

Simulation of computer architectures has made rapid progress recently. The primary application areas are hardware/software performance estimation and optimization as well as functional and timing verification. Recent, innovative technologies such as retargetable simulator generation, dynamic binary translation, or sampling simulation have enabled widespread use of processor and system-on-chip (SoC) simulation tools in the semiconductor and embedded system industries. Simultaneously, processor and SoC simulation is still a very active research area, e.g. what amounts to higher simulation speed, flexibility, and accuracy/speed trade-offs. This book presents and discusses the principle technologies and state-of-the-art in high-level hardware architecture simulation, both at the processor and the system-on-chip level.

目次

System Simulation and Exploration.- The Life Cycle of a Virtual Platform.- Full-System Simulation from Embedded to High-Performance Systems.- Toward the Datacenter: Scaling Simulation Up and Out.- Modular ISA-Independent Full-System Simulation.- Structural Simulation for Architecture Exploration.- Fast Simulation.- Accelerating Simulation with FPGAs.- Scalable Simulation for MPSoC Software and Architectures.- Adaptive High-Speed Processor Simulation.- Representative Sampling Using SimPoint.- Statistical Sampling.- Efficient Cache Modeling with Sparse Data.- Statistical Simulation.- Impact of Silicon Technology.- Memory Modeling with CACTI.- Thermal Modeling for Processors and Systems-on-Chip.- Rapid Technology-Aware Design Space Exploration for Embedded Heterogeneous Multiprocessors.- Embedded Systems Simulation.- IP Modeling and Verification.- Configurable, Extensible Processor System Simulation.- Simulation Acceleration in Wireless Baseband Processing.- Trace-Driven Workload Simulation for MPSoC Software Performance Estimation.

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詳細情報

  • NII書誌ID(NCID)
    BB03870917
  • ISBN
    • 9781441961747
  • LCCN
    2010933795
  • 出版国コード
    us
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    New York
  • ページ数/冊数
    xiii, 345 p.
  • 大きさ
    25 cm
  • 分類
  • 件名
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