Memory-based logic synthesis

著者

• 笹尾, 勤 ササオ, ツトム

書誌事項

Memory-based logic synthesis

Tsutomu Sasao

Springer, 2011

• : softcover

注記

"Softcover re-print of the Hardcover 1st edition 2011"--T.p. verso of softcover

Includes bibliographical references (p. 179-186) and index

内容説明・目次

内容説明

This book describes the synthesis of logic functions using memories. It is useful to design field programmable gate arrays (FPGAs) that contain both small-scale memories, called look-up tables (LUTs), and medium-scale memories, called embedded memories. This is a valuable reference for both FPGA system designers and CAD tool developers, concerned with logic synthesis for FPGAs.

目次

Introduction.- Basic Elements.- Definitions and Basic Properties.- MUX-Based Synthesis.- Cascade-Based Synthesis.- Encoding Method.- Functions with Small C-Measures.- C-Measure of Sparse Functions.- Index Generation Functions.- Hash-Based Synthesis.- Reduction of the Number of Variables.- Various Realizations.- Conclusions.

「Nielsen BookData」 より

詳細情報

• NII書誌ID(NCID): BB06381870
• ISBN:
  • 9781441981035
  • 9781489991539
• LCCN: 2011922264
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: New York
• ページ数/冊数: xii, 189 p.
• 大きさ: 24 cm
• 分類:
  • DC22 : 621.395
• 件名:
  • LCSH : Logic design -- Data processing
  • LCSH : Logic circuits -- Computer-aided design
  • LCSH : Computer storage devices