Nanopackaging : nanotechnologies and electronics packaging
著者
書誌事項
Nanopackaging : nanotechnologies and electronics packaging
Springer, c2008
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注記
Includes bibliographical references and index
内容説明・目次
内容説明
This book presents a comprehensive overview of nanoscale electronics and systems packaging, and covers nanoscale structures, nanoelectronics packaging, nanowire applications in packaging, and offers a roadmap for future trends. Composite materials are studied for high-k dielectrics, resistors and inductors, electrically conductive adhesives, conductive "inks," underfill fillers, and solder enhancement. The book is intended for industrial and academic researchers, industrial electronics packaging engineers who need to keep abreast of progress in their field, and others with interests in nanotechnology. It surveys the application of nanotechnologies to electronics packaging, as represented by current research across the field.
目次
Nanopackaging: Nanotechnologies and Electronics Packaging.- Modelling Technologies and Applications.- Application of Molecular Dynamics Simulation in Electronic Packaging.- Advances in Delamination Modeling.- Nanoparticle Properties.- Nanoparticle Fabrication.- Nanoparticle-Based High-k Dielectric Composites: Opportunities and Challenges.- Nanostructured Resistor Materials.- Nanogranular Magnetic Core Inductors: Design, Fabrication, and Packaging.- Nanoconductive Adhesives.- Nanoparticles in Microvias.- Materials and Technology for Conductive Microstructures.- A Study of Nanoparticles in SnAg-Based Lead-Free Solders.- Nano-Underfills for Fine-Pitch Electronics.- Carbon Nanotubes: Synthesis and Characterization.- Characteristics of Carbon Nanotubes for Nanoelectronic Device Applications.- Carbon Nanotubes for Thermal Management of Microsystems.- Electromagnetic Shielding of Transceiver Packaging Using Multiwall Carbon Nanotubes.- Properties of 63Sn-37Pb and Sn-3.8Ag-0.7Cu Solders Reinforced With Single-Wall Carbon Nanotubes.- Nanowires in Electronics Packaging.- Design and Development of Stress-Engineered Compliant Interconnect for Microelectronic Packaging.- Flip Chip Packaging for Nanoscale Silicon Logic Devices: Challenges and Opportunities.- Nanoelectronics Landscape: Application, Technology, and Economy.- Errata.
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