An introduction to logic circuit testing

著者

    • Lala, Parag K.

書誌事項

An introduction to logic circuit testing

Parag K. Lala

(Synthesis Lectures on digital circuits and systems, 17)

Morgan & Claypool Publishers, c2009

  • : [pbk.]

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注記

Includes bibliographical references

内容説明・目次

内容説明

An Introduction to Logic Circuit Testing provides a detailed coverage of techniques for test generation and testable design of digital electronic circuits/systems. The material covered in the book should be sufficient for a course, or part of a course, in digital circuit testing for senior-level undergraduate and first-year graduate students in Electrical Engineering and Computer Science. The book will also be a valuable resource for engineers working in the industry. This book has four chapters. Chapter 1 deals with various types of faults that may occur in very large scale integration (VLSI)-based digital circuits. Chapter 2 introduces the major concepts of all test generation techniques such as redundancy, fault coverage, sensitization, and backtracking. Chapter 3 introduces the key concepts of testability, followed by some ad hoc design-for-testability rules that can be used to enhance testability of combinational circuits. Chapter 4 deals with test generation and response evaluation techniques used in BIST (built-in self-test) schemes for VLSI chips.

目次

Introduction Fault Detection in Logic Circuits Design for Testability Built-in Self-Test References

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詳細情報

  • NII書誌ID(NCID)
    BB20238436
  • ISBN
    • 9781598293500
  • 出版国コード
    us
  • タイトル言語コード
    eng
  • 本文言語コード
    eng
  • 出版地
    [San Rafael, Calif.]
  • ページ数/冊数
    x, 99 p.
  • 大きさ
    24 cm
  • 親書誌ID
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