Variation-aware advanced CMOS devices and SRAM
著者
書誌事項
Variation-aware advanced CMOS devices and SRAM
（Advanced microelectronics, 56）
Springer Science+Business Media, c2016
注記
Includes bibliographical references
内容説明・目次
内容説明
This book provides a comprehensive overview of contemporary issues in complementary metal-oxide semiconductor (CMOS) device design, describing how to overcome process-induced random variations such as line-edge-roughness, random-dopant-fluctuation, and work-function variation, and the applications of novel CMOS devices to cache memory (or Static Random Access Memory, SRAM). The author places emphasis on the physical understanding of process-induced random variation as well as the introduction of novel CMOS device structures and their application to SRAM.
The book outlines the technical predicament facing state-of-the-art CMOS technology development, due to the effect of ever-increasing process-induced random/intrinsic variation in transistor performance at the sub-30-nm technology nodes. Therefore, the physical understanding of process-induced random/intrinsic variations and the technical solutions to address these issues plays a key role in new CMOS technology development. This book aims to provide the reader with a deep understanding of the major random variation sources, and the characterization of each random variation source. Furthermore, the book presents various CMOS device designs to surmount the random variation in future CMOS technology, emphasizing the applications to SRAM.
目次
1 Introduction: Barriers Preventing CMOS Device Technology from Moving Forward.
2 Understanding of Process-Induced Random Variation.
2.1 Line Edge Roughness (LER).
2.2 Random Dopant Fluctuation (RDF).
2.3 Work-function Variation (WFV).
3 Variation-Aware Advanced CMOS Devices.
3.1 Tri-gate MOSFET.
3.2 Quasi-Planar Trigate (QPT) Bulk MOSFET.
3.3 Tunnel FET (TFET).
4 Applications in Static Random Access Memory (SRAM).
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