Alpha RISC architecture for programmers
著者
書誌事項
Alpha RISC architecture for programmers
Prentice Hall PTR, c1999
- タイトル別名
-
Alpha reduced instruction set computer architecture for programmers
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注記
Includes bibliographical references and index
内容説明・目次
内容説明
8143H-4 The practical guide to computer architecture - based on Alpha, the world's #1 64-bit processor. With Alpha RISC Architecture for Programmers, you can master the fundamentals of computer architecture and assembly language programming in the context of one of the world's most advanced high-performance processors: the 64-bit Alpha. The book introduces assemblers, debuggers, instruction formats, addressing, branch instructions, logical operations, and many other key fundamentals of processor architecture. It delivers real-world guidance for solving practical programming problems - along with extensive runnable sample code.Coverage includes: *Working with bytes in a load/store architecture *Subroutines, procedures, and floating-point operations *Conditional assembly and macros *Text I/O, including UNIX and OpenVMS implementations *Run-time environment support for both high-level and low-level languages *Writing subprograms and linking higher-level modules with assembly language modules Learn how processor architecture impacts performance, including the roles of instruction size, addressing mode, instruction power, program size, in-line functions, recursion, pipelining, compilers, and post-compilation optimization.
Master essential debugging techniques and review the latest features of the Alpha architecture, including the Motion Video Extension and Privileged Architecture Library. The book includes extensive references to Alpha resources for Windows NT, UNIX, and OpenVMS. It will be an invaluable resource for hardware engineers, programmers, and students alike.
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