Principles of Secure Processor Architecture Design

著者

• Szefer, Jakub

書誌事項

Principles of Secure Processor Architecture Design

Jakub Szefer

（Synthesis lectures on computer architecture, 45）

Morgan & Claypool, c2019

• : hardcover

注記

Includes bibliographical references

内容説明・目次

内容説明

This book presents the different challenges of secure processor architecture design for architects working in industry who want to add security features to their designs as well as graduate students interested in research on architecture and hardware security. It educates readers about how the different challenges have been solved in the past and what are the best practices, i.e., the principles, for design of new secure processor architectures. Based on the careful review of past work by many computer architects and security researchers, readers also will come to know the five basic principles needed for secure processor architecture design. The book also presents existing research challenges and potential new research directions. Finally, it presents numerous design suggestions, as well as discussing pitfalls and fallacies that designers should avoid. With growing interest in computer security and the protection of the code and data which execute on commodity computers, the amount of hardware security features in today's processors has increased significantly over the recent years. No longer of just academic interest, security features inside processors have been embraced by industry as well, with a number of commercial secure processor architectures available today. This book gives readers insights into the principles behind the design of academic and commercial secure processor architectures. Secure processor architecture research is concerned with exploring and designing hardware features inside computer processors, features which can help protect confidentiality and integrity of the code and data executing on the processor. Unlike traditional processor architecture research that focuses on performance, efficiency, and energy as the first-order design objectives, secure processor architecture design has security as the first-order design objective (while still keeping the others as important design aspects that need to be considered).

目次

Preface Acknowledgments Introduction Basic Computer Security Concepts Secure Processor Architectures Trusted Execution Environments Hardware Root of Trust Memory Protections Multiprocessor and Many-Core Protections Side-Channel Threats and Protections Security Verification of Processor Architectures Principles of Secure Processor Architecture Design Bibliography Online Resources Author's Biography

「Nielsen BookData」 より

詳細情報

• NII書誌ID(NCID): BB28398301
• ISBN:
  • 9781681734040
• 出版国コード: us
• タイトル言語コード: eng
• 本文言語コード: eng
• 出版地: [S.l.]
• ページ数/冊数: xxi, 151 p.
• 大きさ: 25 cm
• 親書誌ID:
  • BB05535017