Wide bandgap semiconductors for power electronics : materials, devices, applications
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Wide bandgap semiconductors for power electronics : materials, devices, applications
Wiley-VCH, c2022
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Institute of Materials and Systems for Sustainability, Nagoya University未来材料研
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Includes bibliographical references
Description and Table of Contents
Description
Wide Bandgap Semiconductors for Power Electronic A guide to the field of wide bandgap semiconductor technology
Wide Bandgap Semiconductors for Power Electronics is a comprehensive and authoritative guide to wide bandgap materials silicon carbide, gallium nitride, diamond and gallium(III) oxide. With contributions from an international panel of experts, the book offers detailed coverage of the growth of these materials, their characterization, and how they are used in a variety of power electronics devices such as transistors and diodes and in the areas of quantum information and hybrid electric vehicles.
The book is filled with the most recent developments in the burgeoning field of wide bandgap semiconductor technology and includes information from cutting-edge semiconductor companies as well as material from leading universities and research institutions. By taking both scholarly and industrial perspectives, the book is designed to be a useful resource for scientists, academics, and corporate researchers and developers.
This important book:
Presents a review of wide bandgap materials and recent developments
Links the high potential of wide bandgap semiconductors with the technological implementation capabilities
Offers a unique combination of academic and industrial perspectives
Meets the demand for a resource that addresses wide bandgap materials in a comprehensive manner
Written for materials scientists, semiconductor physicists, electrical engineers, Wide Bandgap Semiconductors for Power Electronics provides a state of the art guide to the technology and application of SiC and related wide bandgap materials.
Table of Contents
Volume 1
Preface xiii
Part I Silicon Carbide (SiC) 1
1 Dislocation Formation During Physical Vapor Transport Growth of 4H-SiC Crystals 3
Noboru Ohtani
1.1 Introduction 3
1.2 Formation of Basal Plane Dislocations During PVT Growth of 4H-SiC Crystals 5
1.2.1 Plan-View X-ray Topography Observations of Growth Front 5
1.2.2 Cross-Sectional X-ray Topography Observations of Growth Front 9
1.2.3 Characteristic BPD Distribution in PVT-Grown 4H-SiC Crystals 13
1.2.4 BPD Multiplication During PVT Growth 15
1.3 Dislocation Formation During Initial Stage of PVT Growth of 4H-SiC Crystals 18
1.3.1 Preparation of 4H-SiCWafers with Beveled Interface Between Grown Crystal and Seed Crystal 18
1.3.2 Determination of Grown-Crystal/Seed Interface by Raman Microscopy 19
1.3.3 X-ray Topography Observations of Dislocation Structure at Grown-Crystal/Seed Interface 22
1.3.4 Formation Mechanism of BPD Networks and Their Migration into Seed Crystal 23
1.4 Conclusions 28
References 30
2 Industrial Perspectives of SiC Bulk Growth 33
Adrian R. Powell
2.1 Introduction 33
2.2 SiC Substrates for GaN LEDs 33
2.3 SiC Substrates for Power SiC Devices 34
2.4 SiC Substrates for High-Frequency Devices 35
2.5 Cost Considerations for Commercial Production of SiC 35
2.6 Raw Materials 36
2.7 Reactor Hot Zone 37
2.8 System Equipment 39
2.9 Yield 39
2.10 Turning Boules intoWafers 41
2.11 Crystal Grind 41
2.12 Wafer Slicing 42
2.13 Wafer Polish 44
2.14 Summary 44
Acknowledgments 45
References 45
3 Homoepitaxial Growth of 4H-SiC on Vicinal Substrates 47
Birgit Kallinger
3.1 Introduction 47
3.2 Fundamentals of 4H-SiC Homoepitaxy for Power Electronic Devices 47
3.2.1 4H-SiC Polytype Replication for Homoepitaxial Growth on Vicinal Substrates 48
3.2.2 Homoepitaxial Growth by Chemical Vapor Deposition (CVD) Process 52
3.2.3 Doping in Homoepitaxial Growth 53
3.3 Extended Defects in Homoepitaxial Layers 55
3.3.1 Classification of Extended Defects According to Glide Systems in 4H-SiC 56
3.3.2 Dislocation Reactions During Epitaxial Growth 57
3.3.3 Characterization Methods for Extended Defects in 4H-SiC Epilayers 59
3.4 Point Defects and Carrier Lifetime in Epilayers 62
3.4.1 Classification and General Properties of Point Defects in 4H-SiC 62
3.4.2 Basics on Recombination Carrier Lifetime in 4H-SiC 64
3.4.3 Carrier Lifetime-Affecting Point Defects 65
3.4.4 Carrier Lifetime Measurement in Epiwafers and Devices 68
3.5 Conclusion 69
Acknowledgments 70
References 70
4 Industrial Perspective of SiC Epitaxy 75
Albert A. Burk, Jr., Michael J. O'Loughlin, Denis Tsvetkov, and Scott Ustin
4.1 Introduction 75
4.2 Background 76
4.3 The Basics of SiC Epitaxy 76
4.4 SiC Epi Historical Origins 78
4.5 Planetary Multi-wafer Epitaxial Reactor Design Considerations 80
4.5.1 Rapidly Rotating Reactors 81
4.5.2 Horizontal Hot-Wall Reactors 82
4.6 Latest High-Throughput Epitaxial Reactor Status 82
4.7 Benefits and Challenges for Increasing Growth Rate in all Reactors 86
4.8 IncreasingWafer Diameters, Device Processing Considerations, and Projections 86
4.9 Summary 89
Acknowledgment 90
References 90
5 Status of 3C-SiC Growth and Device Technology 93
Peter Wellmann, Michael Schoeler, Philipp Schuh, Mike Jennings, Fan Li, Roberta Nipoti, Andrea Severino, Ruggero Anzalone, Fabrizio Roccaforte, Massimo Zimbone, and Francesco La Via
5.1 Introduction, Motivation, Short Review on 3C-SiC 93
5.2 Nucleation and Epitaxial Growth of 3C-SC on Si 95
5.2.1 Growth Process 95
5.2.2 Defects 98
5.2.3 Stress 102
5.3 Bulk Growth of 3C-SiC 103
5.3.1 Sublimation Growth of (111)-oriented 3C-SiC on Hexagonal SiC Substrates 104
5.3.2 Sublimation Growth of 3C-SiC on 3C-SiC CVD Seeding Layers 105
5.3.3 Continuous Fast CVD Growth of 3C-SiC on 3C-SiC CVD Seeding Layers 110
5.4 Processing and Testing of 3C-SiC Based Power Electronic Devices 117
5.4.1 Prospects for 3C-SiC Power Electronic Devices 117
5.4.2 3C-SiC Device Processing 117
5.4.3 MOS Processing 118
5.4.4 3C-SiC/SiO2 Interface Passivation 120
5.4.5 Surface Morphology Effects on 3C-SiC Thermal Oxidation 121
5.4.6 Thermal Oxidation Temperature Effects for 3C-SiC 122
5.4.7 Ohmic Contact Metalization 123
5.4.8 N-type 3C-SiC Ohmic Contacts 126
5.4.9 Ion Implantation 126
5.5 Summary 127
Acknowledgements 127
References 127
6 Intrinsic and Extrinsic Electrically Active Point Defects in SiC 137
Ulrike Grossner, Joachim K. Grillenberger, Judith Woerle, Marianne E. Bathen, and Johanna Muting
6.1 Characterization of Electrically Active Defects 141
6.1.1 Deep Level Transient Spectroscopy 141
6.1.1.1 Profile Measurements 143
6.1.1.2 Poole-Frenkel Effect 143
6.1.1.3 Laplace DLTS 143
6.1.2 Low-energy Muon Spin Rotation Spectroscopy 144
6.1.2.1 SR and Semiconductors 144
6.1.3 Density Functional Theory 145
6.2 Intrinsic Electrically Active Defects in SiC 146
6.2.1 The Carbon Vacancy, VC 147
6.2.2 The Silicon Vacancy, VSi 152
6.3 Transition Metal and Other Impurity Levels in SiC 153
6.4 Summary 159
References 163
7 Dislocations in 4H-SiC Substrates and Epilayers 169
Balaji Raghothamachar and Michael Dudley
7.1 Introduction 169
7.2 Dislocations in Bulk 4H-SiC 170
7.2.1 Micropipes (MPs) and Closed-core Threading Screw Dislocations (TSDs) 170
7.2.2 Basal Plane Dislocations (BPDs) 171
7.2.3 Threading Edge Dislocations (TEDs) 171
7.2.4 Interaction between BPDs and TEDs 171
7.2.4.1 Hopping Frank-Read Source of BPDs 171
7.2.5 Threading Mixed Dislocations (TMDs) in 4H-SiC 173
7.2.5.1 Reaction Between Threading Dislocations with Burgers Vectors of c+a and c+a Wherein the Opposite c-Components Annihilate Leaving Behind the Two a-Components 174
7.2.5.2 Reaction Between Threading Dislocations with Burgers Vectors of -c and c+a Leaving Behind the a-Component 175
7.2.5.3 Reaction Between Opposite-sign Threading Screw Dislocations with Burgers Vectors c and c 175
7.2.5.4 Nucleation of Opposite Pair of c+a Dislocations and Their Deflection 175
7.2.5.5 Deflection of Threading c+a, c and Creation of Stacking Faults 177
7.2.6 Prismatic Slip during PVT growth 4H-SiC Boules 180
7.2.7 Relationship Between Local Basal Plane Bending and Basal Plane Dislocations in PVT-grown 4H-SiC SubstrateWafers 181
7.2.8 Investigation of Dislocation Behavior at the Early Stage of PVT-grown 4H-SiC Crystals 181
7.3 Dislocations in Homoepitaxial 4H-SiC 184
7.3.1 Conversion of BPDs into TEDs 184
7.3.2 Susceptibility of Basal Plane Dislocations to the Recombination-Enhanced Dislocation Glide in 4H Silicon Carbide 184
7.3.3 Nucleation of TEDs, BPDs, and TSDs at Substrate Surface Damage 188
7.3.4 Nucleation Mechanism of Dislocation Half-Loop Arrays in 4H-SiC Homo-Epitaxial Layers 191
7.3.5 V- and Y-shaped Frank-type Stacking Faults 192
7.4 Summary 192
Acknowledgments 195
References 195
8 Novel Theoretical Approaches for Understanding and Predicting Dislocation Evolution and Propagation 199
Binh Duong Nguyen and Stefan Sandfeld
8.1 Introduction 199
8.2 General Modeling and Simulation Approaches 200
8.3 Continuum Dislocation Modeling Approaches 201
8.3.1 Alexander-Haasen Model 201
8.3.2 Continuum Dislocation Dynamics Models 202
8.3.2.1 The Simplest Model: Straight Parallel Dislocation with the Same Line Direction 203
8.3.2.2 The "Groma" Model: Straight Parallel Dislocations with Two Line Directions 203
8.3.2.3 The Kroener-Nye Model for Geometrically Necessary Dislocations 204
8.3.2.4 Three-dimensional Continuum Dislocation Dynamics (CDD) 204
8.4 Example 1: Comparison of the Alexander-Haasen and the Groma Model 206
8.4.1 Governing Equations 206
8.4.2 Physical System and Model Setup 206
8.4.3 Results and Discussion 209
8.5 Example 2: Dislocation Flow Between Veins 211
8.5.1 A Brief Introduction to Dislocation Patterning and the Similitude Principle 211
8.5.2 Physical System and Model Setup 213
8.5.3 Geometry and Initial Values 214
8.5.4 Results and Discussion 215
8.6 Summary and Conclusion 219
References 220
9 Gate Dielectrics for 4H-SiC Power Switches: Understanding the Structure and Effects of Electrically Active Point Defects at the 4H-SiC/SiO2 Interface 225
Gregor Pobegen and Thomas Aichinger
9.1 Introduction 225
9.2 Electrical Impact of Traps on MOSFET Characteristics 225
9.2.1 Sub threshold Sweep Hysteresis 226
9.2.2 Preconditioning Measurement 231
9.2.3 Bias Temperature Instability 233
9.2.4 Reduced Channel Electron Mobility 235
9.3 Microscopic Nature of Electrically Active Traps Near the Interface 237
9.3.1 The PbC Defect and the Subthreshold Sweep Hysteresis 237
9.3.2 The Intrinsic Electron Trap and the Reduced MOSFET Mobility 238
9.3.3 Point Defect Candidates for BTI 240
9.4 Conclusions and Outlook 242
References 243
10 Epitaxial Graphene on Silicon Carbide as a Tailorable Metal-Semiconductor Interface 249
Michael Krieger and Heiko B. Weber
10.1 Introduction 249
10.2 Epitaxial Graphene as a Metal 249
10.3 Fabrication and Structuring of Epitaxial Graphene 250
10.3.1 Epitaxial Growth by Thermal Decomposition 250
10.3.2 Intercalation 251
10.3.3 Structuring of Epitaxial Graphene Layers and Partial Intercalation 252
10.4 Epitaxial Graphene as Tailorable Metal/Semiconductor Contact 253
10.4.1 Ohmic Contacts 254
10.4.2 Schottky Contacts 256
10.5 Monolithic Epitaxial Graphene Electronic Devices and Circuits 257
10.5.1 Discrete Epitaxial Graphene Devices 257
10.5.2 Monolithic Integrated Circuits 259
10.6 Novel Experiments on Light-Matter Interaction Enabled by Epitaxial Graphene 260
10.6.1 High-Frequency Operation and Ultimate Speed Limits of Schottky Diodes 260
10.6.2 Transparent Electrical Access to SiC for Novel Quantum Technology Applications 263
10.7 Conclusion 264
Acknowledgments 265
References 265
11 Device Processing Chain and Processing SiC in a Foundry Environment 271
Arash Salemi, Minseok Kang, Woongje Sung, and Anant K. Agarwal
11.1 Introduction 271
11.2 DMOSFET Structure 271
11.3 Process Integration of SiC MOSFETs 273
11.3.1 Lithography 283
11.3.2 SiC Etching 283
11.3.3 Ion Implantation and Activation Annealing 290
11.3.4 Oxidation and Oxide 293
11.3.5 Post Oxidation Annealing 296
11.3.6 Poly-Si Deposition 298
11.3.7 Backside Thinning andWaffle Substrates 300
11.3.8 Ohmic Contacts and Metallization 301
11.3.9 Polyimide Deposition 302
11.4 Commercial Foundries for Si and SiC Devices 303
11.4.1 Cost Model 303
11.4.1.1 Cost Roadmap for WBG Devices 303
11.4.2 New Equipment and Processing Requirements 305
11.5 Dedicated Foundries vs. Commercial Foundries 306
References 307
12 Unipolar Device in SiC: Diodes and MOSFETs 319
Sei-Hyung Ryu
12.1 Introduction 319
12.2 Unipolar Diodes - 4H-SiC JBS Diodes 320
12.2.1 Optimization of 4H-SiC JBS Diodes 323
12.2.1.1 Injection from the p+ Regions for Surge Operation 324
12.2.1.2 Trench JBS Diodes 326
12.2.1.3 Use of LowWork Function Metal for Anode Metal 327
12.3 Unipolar Switches: Power MOSFETs 329
12.3.1 4H-SiC Power MOSFET Structures 332
12.3.1.1 DMOSFETs 332
12.3.1.2 Trench MOSFETs 337
12.3.2 Advanced Power MOSFET Structures in 4H-SiC 342
12.3.2.1 Superjunction MOSFETs in 4H-SiC 342
12.3.2.2 Integrated JBS Diodes in 4H-SiC Power MOSFETs 345
12.4 Summary 346
References 348
Volume 2
13 Ultra-High-Voltage SiC Power Device 353
Yoshiyuki Yonezawa and Koji Nakayama
14 SiC Reliability Aspects 387
Josef Lutz and Thomas Basler
15 Industrial Systems Using SiC Power Devices 433
Nando Kaminski
16 Special Focus on HEV and EV Applications: Activities of Automotive Industries Applying SiC Devices for Automotive Applications 467
Kimimori Hamada, Keiji Toda, Hiromichi Nakamura, Shigeharu Yamagami, and Kazuhiro Tsuruta
17 Point Defects in Silicon Carbide for Quantum Technology 503
Andras Csore and Adam Gali
Part II Gallium Nitride (GaN), Diamond, and Ga2O3 529
18 Ammonothermal and HVPE Bulk Growth of GaN 531
Robert Kucharski, Tomasz Sochacki, Boleslaw Lucznik, Mikolaj Amilusik, Karolina Grabianska, Malgorzata Iwinska, and Michal Bockowski
19 GaN on Si: Epitaxy and Devices 555
Hidekazu Umeda
20 Growth of Single Crystal Diamond Wafers for Future Device Applications 583
Matthias Schreck
21 Diamond Wafer Technology, Epitaxial Growth, and Device Processing 633
Hideaki Yamada, Hiromitsu Kato, Shinya Ohmagari, and Hitoshi Umezawa
22 Gallium Oxide: Material Properties and Devices 659
Masataka Higashiwaki
Index 681
by "Nielsen BookData"
